The finite state machine is designed to perform traffic light controller operation by changing state at particular time delay and each state trigger 3 red LED’s on 3 sides and switch from green to yellow and yellow to red each side and each state. In this project, ModelSim and Quartus II software are used to program and simulate the traffic light controller system that written in Verilog Hardware. Traffic Light Controller Placement in Spartan6 FPGA Development Kit VHDL Code Description: Schematics to interface Traffic Light Controller with Spartan6 FPGA Schematics to interface Traffic Light Controller with Spartan6 FPGA Through series Resister 330 ohm and another end is terminated to ground. Traffic_Light_Controller VHDL code for Traffic Light Controller interfacing with Spartan6 FPGA kitĪll the 12 LED’s interfaced with Spartan3 FPGA Development Board Each LED has provided for current limiting resistor to limit the current flows to the LEDs. Each lane has Go (Green), Listen(Yellow) and Stop(Red) LED is being placed. Traffic light controller consists of 12 Nos. VHDL code for Traffic Light Interface With FPGA Traffic Light Controller
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February 2023
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